The present invention relates to a fully integrated long time constant integrator circuit which finds application in long time constant feedback loop arrangements such as control circuits in optical receivers.
The ever increasing demands for high capacity communications systems has seen the wide spread employment of optical fibre networks across the world. A fundamental component for such systems is a means of converting optical pulses comprising a digital bit stream into electrical signals. This component of such a system is commonly known as an optical receiver.
The operational requirements of such a receiver are very demanding. The receiver is required to exhibit a very low noise characteristic, such that it is capable of detecting very low levels of optical input in systems employing maximum optical fibre lengths, thus requiring high gain amplification for maximum sensitivity, but is conversely required to cope with high levels of optical input in systems employing short fibre lengths, thus requiring low gain amplification. As such, the optical receiver is required to have a wide dynamic range which can only be practically achieved with some form of automatic gain control (AGC). A typical integrated circuit (IC) optical receiver 10 is illustrated in block schematic form in FIG. 1. This comprises an IC (denoted by broken line 12) including a transimpedance amplifier stage (denoted by broken line 14) with an integrator in a control loop providing AGC.
As illustrated by FIG. 1, optical input power OPIN is converted into an electrical current IIN by a PIN diode photodetector 16. This current IIN is applied as an input to the IC optical receiver 10. The input current IIN is amplified by a transimpedance amplifier (Tz Amp) 18 which converts the input current IIN into an amplified voltage output signal VOUT. To meet the requirement of wide dynamic range, the output voltage VOUT of the Tz Amp 18 which is in the form of a broadband data signal and may be considered as an ac, multi-frequency signal, is rectified or peak detected by a rectifier/peak detector 20 to provide a dc signal level VREC for comparison with a pre-determined dc reference voltage VREF. The difference between the rectified/peak detected output voltage VREC and the reference voltage VREF is considered as an error signal which is amplified and integrated by a Miller Integrator 22 to provide a control signal VCONTROL. A Miller Integrator is a well known form of integrator incorporating an active device such as a transistor amplifier. The Miller Integrator 22 is required to have a high gain, in order to ensure that the error signal approaches zero (ie in order to ensure that the difference between the rectified/peak detected output voltage VREC and the reference voltage VREF becomes zero) by means of controlling the gain of the Tz Amp by varying the impedance of a feedback resistor 24.
If the rectified/peak detected output voltage VREC is smaller than the dc reference voltage VREF, then the Tz Amp 18 must operate at high gain to provide high sensitivity of the optical receiver. When the rectified/peak detected output voltage VREC becomes just greater than the dc reference voltage VREF, then the on-set of AGC occurs and continues whilst the input channel IIN increases. When the feedback resistor 24 is at a minimum the Tz Amp is operating at very low gain and approaches an overload condition.
In addition, the Miller Integrator is required to have a long time constant (Tp) so that the effect of the AGC action of the control loop does not compromise data embedded in the voltage output signal VOUT of the Tz Amp.
The requirements for the time constant Tp of the Miller integrator can be better understood with reference to FIG. 2 which identifies the fundamental gain stages of the typical optical receiver of FIG. 1.
To understand the effects of the Miller Integrator time constant Tp, each gain block of the optical receiver 10 must be considered. For a first order approximation, the Tz Amp gain of the optical receiver 10 is proportional to VOUT/IIN and can be considered as the value Rf of the feedback resistor 24. This assumes that the Tz Amp gain is constant for all frequencies up to an upper xe2x88x923 dB point. This assumption is only true if the AGC is not operating which is often the case at low optical input levels. Once the AGC begins to operate to prevent the output signal VOUT from increasing further, this has a significant effect on the Tz Amp gain. Using standard feedback control theory, the presence of a pole in the control loop feedback path (ie Tp of the Miller Integrator) presents a zero in the forward Tz Amp gain path, reduced by a factor of the loop gain. To illustrate the above, consider the loop gain of the optical receiver as:
Loop Gain=Tzo.Ar.Ao/Rf
where Tzo=Open loop gain of the Tz Amp
Rf=Value of the feedback resistor
Ar=Rectifier gain
Ao=Open loop gain of the Miller Integrator
The forward closed loop transimpedance gain of the Tz Amp is given by:
TzCL=(1+sTz).Rf
where S=Laplace operator
and Tz=Tp/(Loop Gain)
∴Tz=Tp.Rf/(Tzo.Ar.Ao)
Consequently, the time constant Tz in the forward Tz Amp gain path is greatly reduced by the loop gain of the control circuit. In the typical arrangement, the Miller Integrator pole position (ie Tp of the Miller Integrator) is such that it results in a transmission zero in the MHz region. This can have the undesirable effect of generating pattern dependant jitter in the broadband data stream.
In a typical scenario, for a 155 Mbit/sec data stream, the transmission zero should be at 25 KHz or below to prevent jitter in the broadband data stream, representing a time constant Tz=6.36 xcexcsecs. Typically, Tzo=4 Mxcexa9, Ar=2, Ao=100 and Rf=50 Kxcexa9. Consequently, the loop gain is 16000(or 84.1 dB). This requires a very long, relatively speaking, Miller Integrator time constant Tp of approximately 0.1 secs.
Using present bipolar IC technology, the maximum practicable size of resistors than can be manufactured xe2x80x9con chipxe2x80x9d are in the Mxcexa9 region. For example, if a 1.5 Mxcexa9 resistor is fabricated on chip, the required value of capacitor to provide a 25 KHz high pass cut-off needs to be in the order of 67 nF. However, present bipolar IC technology allows a maximum practicable value of capacitors in the region of tens to hundreds of pF to be formed on chip. Therefore, it can be seen that to achieve the necessary high pass cut-off frequency of 25 KHz would require connection of a large size discrete component capacitor to the optical receiver integrated circuit. This normally comprises a lumped silicon device which is mounted on pads on the silicon substrate containing the integrator IC. The optical receiver IC is normally contained in a DIL package which is hermetically sealed. Experience has shown that it is the connections of the discrete component capacitor which provide the most likely points of failure of the device under test. Failed devices are normally discarded, it being extremely difficult and expensive to recover any of the constituent parts of the device for reuse. A known alternative is to connect a combination of discrete resistor and capacitor components to the optical receiver IC but this is equally undesirable for the same reasons as aforesaid.
It is also known to fabricate IC transimpedance amplifiers using BiCMOS technology. In such a case, a Field Effect Transistor (FET) can be used to provide very low current leakage of an on-chip capacitor which has been charged from the peak detection circuit thus providing the necessary long time constant. This technology allows a fully integrated IC optical receiver to be provided but at a higher cost than one provided using bipolar technology.
The invention seeks to provide a long time constant IC integrator without requiring external large value capacitor and/or resistor components.
The invention also seeks to provide a long time constant bipolar IC integrator.
The invention further seeks to provide a fully integrated circuit transimpedance amplifier for an optical receiver.
The invention further seeks to provide a transimpedance amplifier for an optical receiver which obviates some of the problems encountered with known IC transimpedance amplifiers.
The present invention provides an integrated circuit (IC) integrator consisting of an input attenuation stage followed by an operational amplifier stage configured as a Miller Integrator. A resistive element couples the output of the attenuation stage to the input of the op-amp stage. The op-amp stage has a feedback loop coupling its output to its input, said feedback loop including a capacitive element. The capacitive and resistive elements define between them a fundamental time constant CR for the circuit. However, the effect of the attenuation stage is to multiply the effect of the resistive element thereby enhancing the time constant of the circuit. The integrated circuit integrator is formed using a bipolar process using only npn devices although other bipolar technology is applicable. The integrator circuit in accordance with the invention has the potential to provide an enhanced circuit time constant which is in the order of 1000 times greater than the fundamental time constant. This is the consequence of two effects. The fundamental time constant is increased on the one hand by the gain provided by the op-amp stage and on the other hand is enhanced as a result of the attenuation achieved in the attenuation stage. In the preferred embodiment, the attenuation stage comprises a transconductant stage.